1. Field of the Invention
The present invention relates in general to .DELTA..SIGMA. digital/analog converters, and more particularly to a .DELTA..SIGMA. digital/analog converter in which a multi-bit internal sub-converter includes a minimized number of passive devices to reduce an error amount resulting from a process deviation, miniaturize a chip and enhance the internal bit extensibility.
2. Description of the Prior Art
In a conventional .DELTA..SIGMA. digital/analog converter, an internal sub-converter which plays the key role in determining the overall resolution includes a plurality of passive devices in order to employ the so-called dynamic matching method. A different combination of the passive devices is selected at every signal conversion according to a pseudo random rule in order to generate a white noise in the internal sub-converter. For example, a 3-bit internal sub-converter includes eight passive devices. A different combination of the eight passive devices in the 3-bit internal sub-converter is selected to output an analog signal corresponding to the input digital signal. For example, assume that two of the eight passive devices are selected. In this case, rather than selecting two specific passive devices, random passive devices such as the first and second passive devices or the first and third passive devices are selected. As a result, when the number of internal bits is n, the possible number of combinations of the passive devices required to embody the internal sub-converter are theoretically (2.sup.n)!.
In practice, the internal sub-converter employs a butterfly randomizer as shown in FIG. 1 to reduce a burden on the hardware. The butterfly randomizer includes a series of switching connections in the form of a butterfly between input devices and the output terminal. FIG. 1 is the view illustrating the combinations of the passive devices in the 3-bit internal sub-converter employing the butterfly randomizer. In FIG. 1, the left reference numerals 0-7 designate the passive devices, respectively, and the right reference numerals 0-7 designate output values of the analog signal, respectively. Also, the reference numerals S1-S12 designate switches, respectively. For example, assume that the passive device of No. 1 and the passive device of No. 3 are selected in such a manner that the output value of the analog signal can become 2. In this case, the No. 1 passive device follows a path of switch S1 ON.fwdarw.switch S5 ON.fwdarw.switch S11 OFF and the No. 3 passive device follows a path of switch S2 ON.fwdarw.switch S5 OFF.fwdarw.switch S11 OFF. Here, it is assumed that a diagonal direction is selected if the switch is ON, whereas a straight direction is selected if the switch is OFF.
The above-mentioned conventional .DELTA..SIGMA. digital/analog converter which employs a dynamic matching method has a disadvantage of the hardware complexity for whitening the noise of the random process variation.